Vikhetan Appa » Logic Minimizer
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Logic Minimizer 1.2.1

Free Logic Minimizer screenshot fileWorks with Windows Vista
Logic Minimizer is an innovative, versatile application for simplifying Karnaugh maps and logical expressions step by step. It is geared for those involved in engineering fields, more precisely digital and formal logic scholars and academics, digital devices constructors or anybody involved with logical expressions. With its powerful minimization capabilities and full-fledged features, you can work with all forms of logic expressions.

Features:

Minimize Boolean and propositional formulae up to 24 variables
Convert Boolean formulae into SOP, POS and decimal notation
Work with Karnaugh map, truth table and sets of terms
Highlight minimized term on Karnaugh Map
Draw logic circuit with various types of logic gates
Optimize simplified Boolean formula with XOR gates
Convert propositional formulae into DNF and CNF
Find validity of propositional formulae
Support all Boolean and propositional operators
Formula-input-friendly: no need to transform your formula before entering
Step by step simplification of Boolean and propositional expressions
Type : Shareware ($22.95) » EULA
OS Support : Windows All + Vista
Date stamp / Size : Apr, 23. 2010 / 7086 kBytes
Asked : PC with Pentium class processor, 64MB of RAM, 12.5MB of free hard disk space, mouse/pointing device
Users' value : - Write a Review
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Update history of Logic Minimizer
v1.2.1 (April, 8. 2010)
Step by step solver handles XOR operator, compatible with Windows 7
v1.1 (February, 4. 2009)
Draws logic circuit, faster minimization algorithm, multi-level XOR optimization, minor interface enhancements, minor bugs resolved
v1.0.3 (December, 5. 2008)
Supports input and display of Verilog compatible formulae
Distribution permissions for Logic Minimizer
This Software may be freely distributed online or on other electronic media provided that the files are
not modified in any way.
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